Forming semiconductor packages requires forming semiconductor structures on a front side, generally characterized as the “active surface,” of a wafer or other bulk semiconductor substrate bearing a large number of semiconductor devices (which structures may be characterized generally as a “device wafer”) and, in some instances, interconnecting the circuitry of the active surface with an opposite, or back side, of each semiconductor device (e.g., to contact pads, bond pads, etc.). After processing of the active surface is completed, the device wafer is inverted down and attached to a carrier wafer for completion of the back side.
A number of existing processes have been developed to form electrical connections between the back side and the active surface of semiconductor devices. For example, a device wafer may be temporarily bonded to a carrier wafer, the back side made be thinned and processed to form electrical interconnections with the active surface, and then released from the carrier wafer. Semiconductor substrates in the form of device wafers are conventionally bonded to carrier wafers and thinned down using techniques including “back grinding” and chemical mechanical planarization (CMP) to provide conductive access to the circuitry of the active surface side.
During back side processing, the active surface of the device wafer may become damaged or the bond between the carrier wafer and device wafer may weaken. For example, where an adhesive or a polymer material is used to temporarily bond the device wafer to the carrier wafer, exposing the adhesive or polymer to temperatures above about 200° C. may prematurely release the carrier wafer from the device wafer. In addition, the adhesive may damage or contaminate the active surface circuitry as well as conductive elements connected to such circuitry and protruding from the active surface since the circuitry and conductive elements are in contact with the adhesive during the back side processing. In addition, during thinning of the device wafer from the back side, the device wafer may become warped and the total thickness variation of the device wafer may increase because of the warping.